Non-Conventional Σ∆ Architectures for Very Low-Power and Medium Resolution Applications

Non-conventional architectures that enable optimizing the power consumption in a second-order or an equivalent second-order scheme are proposed. The solutions exploit the significant difference in power consumption of comparators and OTAs that makes it advantageous to use more comparators to replace an OTA. Moreover, the use of op-amp time-sharing is discussed. For this a conventional second order Σ∆ scheme must be properly modified. Simulation results verify the effectiveness of the proposed solutions.